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Wednesday, 2 January 2013


                 The PIC microcontroller family

The PIC microcontroller family of microcontrollers is manufactured by Microchip Technology
Inc.
Currently they are one of the most popular microcontrollers used in many commercial and
industrial applications. Over 120 million devices are sold each year.

The PIC microcontroller architecture is based on a modified Harvard RISC (Reduced Instruction
Set Computer) instruction set with dual-bus architecture, providing fast and flexible design with
an easy migration path from only 6 pins to 80 pins, and from 384 bytes to 128 kbytes of program
memory.

PIC microcontrollers are available with many different specifications depending on:

•    Memory Type
-     Flash
-     OTP (One-time-programmable)
-     ROM (Read-only-memory)
-     ROMless
^ Input-Output (I/O) Pin Count
-     4-18 pins
-     20-28 pins
-     32-44 pins
-     45 and above pins
^ Memory Size
-     0.5-1 K
-     2-4 K
-     8-16 K
-     24-32 K
-     48-64 K
-     96-128K
    Special Features
-     CAN
-     USB
-     LCD
-     Motor Control
-     Radio Frequency

Although there are many models of PIC microcontrollers, the nice thing is that they are upward
compatible with each other and a program developed for one model can very easily, and in many
cases with no modifications, be run on other models of the family. The basic assembler instruction
set of PIC microcontrollers consists of only 33 instructions and most of the family members (except
the newly developed devices) use the same instruction set. This is why a program developed for one
model can run on another model with similar architecture without any changes.
All PIC microcontrollers offer the following features:
     RISC instruction set with only a handful of instructions to learn
     Digital I/O ports
^  On-chip timer with 8-bit prescaler
    Power-on reset
    Watchdog timer
    Power saving SLEEP mode
    High source and sink current
    Direct, indirect, and relative addressing modes
    External clock interface
    RAM data memory
    EPROM or Flash program memory
Some devices offer the following additional features:
    Analogue input channels
    Analogue comparators
    Additional timer circuits
    EEPROM data memory
    External and internal interrupts
    Internal oscillator
    Pulse-width modulated (PWM) output
    USART serial interface
Some even more complex devices in the family offer the following additional features:
    CAN bus interface
^ I2C bus interface
    SPI bus interface
    Direct LCD interface
    USB interface
    Motor control
Although there are several hundred models of PIC microcontrollers, choosing a microcontroller
for an application is not a difficult task and requires taking into account these factors:
    Number of I/O pins required
^ Required peripherals (e.g. USART, USB)

•     The minimum size of program memory
•     The minimum size of RAM
^ Whether or not EEPROM non-volatile data memory is required
    Speed
    Physical size
^ Cost.
The important point to remember is that there could be many models which satisfy all of the above
requirements. You should always try to find the model which satisfies your minimum require-
ments and the one which does not offer more than you may need. For example, if you require a
microcontroller with only 8 I/O pins and if there are two identical microcontrollers, one with 8
and the other one with 16 I/O pins, you should select the one with 8 I/O pins.
Although there are several hundred models of PIC microcontrollers, the family can be broken
down into three main groups, which are:
^ 12-bit instruction word (e.g. 12C5XX, 16C5X)
^ 14-bit instruction word (e.g. 16F8X, 16F87X)
^ 16-bit instruction word (e.g. 17C7XX, 18C2XX).
All three groups share the same RISC architecture and the same instruction set, with a few add-
itional instructions available for the 14-bit, and many more instructions available for the 16-bit
models. Instructions occupy only one word in memory, thus increasing the code efficiency and
reducing the required program memory. Instructions and data are transferred on separate buses,
thus the overall system performance is increased.





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